Conventionally, a multi-layer printed wiring board with an embedded capacitor circuit uses one or more insulating layer(s) locating in the inner layer of the board as dielectric layer(s). An inner layer circuit locating on each side of the dielectric layer includes a capacitor: a first electrode circuit and a second electrode circuit, which face each other. Therefore, such a capacitor circuit is sometimes referred to as an embedded capacitor circuit.
Such a multi-layer printed wiring board with an embedded capacitor circuit has been manufactured by adopting a manufacturing method shown in FIG. 22 to FIG. 24. As shown in FIG. 22(a), a dielectric layer constituting material (a metal clad dielectric 2a) having a conductor layer 4 on each side of a dielectric layer 3 is used. The conductor layer 4 on one side is etched to form a first electrode circuit 5 to obtain the state shown in FIG. 22(b). At this time, the dielectric layer is exposed in areas except where the first electrode circuit 5 is formed. And the side which is substantially not subjected to the etching at this time works as a second electrode circuit 6.
Then as shown in FIG. 23(c), a prepreg 7 and a metal foil 4 are laminated to each side of the dielectric layer constituting material 1d in which the first electrode circuit 5 is formed, to give the state shown in FIG. 23(d). After that, metal layers 4 locating at outer layers are processed to be outer layer circuits 22 by etching etc. to obtain a four-layer multi-layer printed wiring board with embedded capacitor 20′ shown in FIG. 24(e).
The method for manufacturing a multi-layer printed wiring board with an embedded capacitor circuit shown in FIG. 22 to FIG. 24 has a dielectric layer spreading all over the multi-layer printed wiring board, and the dielectric layer exists around power supply lines and signal transfer lines as well as the capacitor circuit. This dielectric layer causes a problem of increasing dielectric loss at transferring signals etc. due to high dielectric constant of the dielectric layer. Moreover, the dielectric layer usually introduces some restrictions on circuit design because it is often impossible to bury other circuit devices such as an inductor in the dielectric layer.
Therefore, in order to form the dielectric layer only in area that require the dielectric layer, those skilled in the art have adopted methods such as burying a high dielectric constant material in perforated positions of a dielectric layer provided on the surface of an inner layer substrate as disclosed in Patent Document 1 (Japanese Patent Laid-Open No. 09-116247); transferring a layer with a capacitor circuit previously formed on a resin film to the surface of an inner layer core material as disclosed in Patent Document 2 (Japanese Patent Laid-Open No. 2000-323845); or printing dielectric filler containing paste by screen printing method as disclosed in Patent Document 3 (Japanese Patent Laid-Open No. 08-125302).    Patent Document 1: Japanese Patent Laid-Open No. 09-116247    Patent Document 2: Japanese Patent Laid-Open No. 2000-323845    Patent Document 3: Japanese Patent Laid-Open No. 08-125302
However, the inventions disclosed in Patent Document 1 (Japanese Patent Laid-Open No. 09-116247), Patent Document (Japanese Patent Laid-Open No. 2000-323845) and Patent Document 3 (Japanese Patent Laid-Open No. 08-125302) almost always cause lack of film thickness uniformity of the dielectric layer, a problem regarding accuracy of position in transferring method and screen printing method, and dielectric strength tests of a capacitor layer has to be conducted for end products, even though the inventions may solve the state remaining of the dielectric layer in unnecessary area.
The capacitor is required to have an electric capacity as large as possible as a fundamental quality thereof. The capacity (C) of a capacitor is calculated with the formula C=∈∈0(A/d) (∈0 is the dielectric constant of vacuum). Improvement of the surface area (A) is obviously has a limit. This is because there is an increasing demand for downsized printed wiring boards in conformity with the particularly recent downsizing trend of electronic and electric equipments, and it is almost impossible to make the area of the capacitor electrode larger in a certain limited area of a printed wiring board. Accordingly, for the purpose of increasing the capacity of a capacitor, it is necessary to make the thickness (d) of the dielectric layer thinner, when the surface area (A) of the capacitor electrode and relative dielectric constant (∈) of the dielectric layer are constant. Therefore, lack of film thickness uniformity cause deviation in quality of capacitors, which is not preferable.
Moreover, problems in accuracy of position in transferring method and screen printing method causes deviation between positions of formed first electrode and second electrode, which decreases effective area of the surface area (A) that determines an electric capacity of a capacitor. Thus capacitor properties as originally designed cannot be obtained, and product quality becomes out of specification.
Then there has been a demand for techniques for manufacturing a multi-layer printed wiring board and a multi-layer printed wiring board with an embedded capacitor circuit in which electric characteristics with stability are assured by excellent accuracy of position of capacitor circuits, and removal of unnecessary dielectric layer that exists in area except for capacitor circuit positions.